The present invention relates to a circuit technology for latching input data, and more specifically to a hold-type latch circuit having a control function which holds the output logic state under a predetermined condition, such as technology that can be effectively adapted to a bipolar logic LSI (large-scale semiconductor integrated circuit device).
There has been known a flip-flop circuit or a latch circuit as a logic circuit which has two stable output states which are dependent on the input logic state and which holds the previous state depending on the input logic state. A latch circuit can be formed by adding a logic gate to the input stage of an RST flip-flop that has a reset input terminal, a set input terminal and a clock input terminal. The operation of the latch circuit resembles that of the D-type flip-flop, in which a change in the data input under the condition where a clock input is assuming a high level is transmitted to the output terminal thereof. The logic state of the output cannot change when the clock input is fixed to a low level. By utilizing such a holding function, the state of signal is held under a predetermined condition, and the state thus held is transmitted to a control circuit or the like circuit at predetermined intervals.
As an example of a literature which describes the latch circuit, there can be cited "A Pocket Book on Electronic Engineering" (P. 8-46.about.P. 8-53) published by ohm Co., 1980.